1. Field of the Invention
The present invention relates to a method and apparatus for transferring one substrate at a time (single substrate transfer) between equipments for processing substrates such as semiconductor substrates, liquid crystal substrates and other substrate parts (hereinafter called wafers).
2. Description of the Related Art
The prior art for transferring wafers one by one between equipments for processing the wafers is disclosed for example in “Production Technique Innovation of LSI Lines” by Katsuhiro Nozaki, NIKKEI MICRODEVICES, August 1993, pages 25–32.
This prior art mainly discloses the following:                1. An automated line capable of efficiently utilizing single wafer processing equipments and cluster tools;        2. A concept of a production line that enables “large item various volume production” by performing single wafer transfer within the bay;        3. A single wafer transfer that is capable of corresponding to variable items and production volume;        4. Cutting down on the number of wafers being worked by the combination of the single wafer processing equipments;        5. Utilizing lot transfer between bays; and        6. Connecting processing chambers for different processes to one cluster tool when starting mass production.        
The production capacity will be suppressed if the number of equipments is small. Therefore, the processing capacity of even a single cluster tool is increased in an analog manner by connecting plural processing chambers performing the same process or by adding a module capable of performing plural processes.
Moreover, the above prior art illustrates the following.
On both sides of a wafer transfer system having a deformed U-shape planar shape are disposed plural multiprocessing equipments, thus constituting a bay. In other words, plural multiprocessing equipments are disposed along each of the two rows of parallel transfer lines of the U-shaped wafer transfer system within the bay. In a number of areas of the wafer transfer system are disposed shuttles with robots. An I/O is disposed between each processing equipment and the transfer line. Further, a lot transfer system is adopted for transferring wafers between bays.
FIG. 1 illustrates the second example of the prior art. FIG. 2 appeared in Semiconductor Industry Newspaper on Dec. 5, 2001. This is a module automation example of a single wafer production system indicated by ITRS (International Technology Roadmap for Semiconductors). The system adopts 25-lot transfer Utilizing FOUP and direct single wafer transfer between processes. The black circles indicate wafers, and processing within processing equipments and transferring between processing equipments are performed by single wafers. According to this system, by adopting single wafer processes and direct transferring, the waiting time of wafers which used to correspond to 25-wafer transfer according to the prior art FOUP transfer is reduced to zero, and auxiliary equipments such as FOUP openers and EFEM are no longer necessary.
Moreover, similar prior art is disclosed for example in “Quickness is key to system LSI production—TAT shortened greatly by single wafer production/transfer” by Takehide Hayashi, Electronic Journal, February 2002, pp 95–99.
FIG. 2 illustrates a third prior art example. FIG. 2 comprises a processing portion including plural processing units for performing a series of treatments including applying resist to the wafers, performing exposure and development, and etching the developed wafers, the processing units disposed on both sides of a transfer path; main transfer units that move along the transfer path and convey wafers to the processing units; and an I/O portion comprising a transfer mechanism for transferring the wafers to the main transfer unit; wherein the processing units of the processing portion, the transfer path and the I/O portion being formed integrally.
FIG. 3 illustrates a fourth prior art example. FIG. 3 illustrates a transfer path along which travel transfer equipments for transferring, for example, a glass substrate with TFT arrays used to create liquid crystal displays (LCD), and disposed along the transfer path are an etching equipment for creating a layer of the glass substrate, a first inspection unit, a resist separation equipment, a buffer for standby substrates, a cleaning equipment, a deposition equipment and a second inspection unit. On one end of the transfer path is disposed a substrate input portion, and on the other end is a substrate output portion where cassettes are housed in a multistage shelf, having an elevation mechanism enabling the shelf to elevate so that the transfer unit can access each cassette.
Although the composition of the bay differ according to the prior art examples, the wafer transfer system for transferring the wafer, the substrate or the glass substrate within the bay, the single wafer direct transfer system and the transfer path are all formed as an integral single body according to the examples, so there exist following problems to be solved.                1. The wafer transfer within the bay and the wafer conveyance (wafer handover) between the wafer transfer means and the processing equipments are rate-determined by the longest wafer processing time of the plural processing units (and the wafer transfer time within the processing equipment). Therefore, waiting time occurs for the in-bay wafer transfer and the handing over of wafers to processing units, deteriorating the throughput within the bay. This problem most noticeably occurs according to the prior art examples two through four illustrated in FIGS. 1–3 where the wafer processing performed at each processing equipment differ.        2. For example, if two FOUPs contain wafers to which different processing are to be performed, for example, if wafers in one FOUP require plasma etching treatment and wafers in the other FOUP require plasma CVD treatment, there exists a difference in required processing time for performing the different treatments. Therefore, the wafer transfer within the bay and the wafer handover between the wafer transfer means and the processing equipments are rate-determined by the treatment requiring longer processing time, which is in this case the plasma CVD processing. Therefore, waiting time occurs for the wafer transfer within the bay for wafers especially requiring plasma etching treatment and the transfer between the transfer equipment and the etching equipment, deteriorating the throughput of the bay.        3. Even if the wafer processing performed in all the processing equipments within the bay are the same (for example, the same processing contents and same processing conditions), since the wafer transfer time required for the in-bay transfer means differ from the processing time within the processing equipment plus the wafer transfer time within the processing equipment, there may occur confusions related to the handover of wafers between the in-bay transfer means and the processing equipments or the wafer transfer within the bay, which may lead to deterioration of throughput.        4. If wafers requiring a long processing time and wafers requiring a short processing time are mixed throughout the in-bay transfer line, the already-processed wafers requiring short processing time cannot be transferred from the processing equipment to the transfer line and onto the next processing equipment if the wafer requiring a long processing time existing in front of that wafer has not yet finished its treatment. In other words, waiting time occurs. According to the prior art, there is no recognition of a technique to selectively utilize the transfer line (or transfer lines) to transfer both the wafers requiring short processing time and wafers requiring long processing time in an efficient manner. Therefore, according to the prior art, the transfer time is rate-determined by the wafers having longer processing time. Therefore, the processing time is delayed and the overall speed is deteriorated, and as a result, the throughput of the whole bay is deteriorated.        5. According to large item small volume production, when a wafer requiring express treatment is transferred along the wafer transfer line but a shuttle having a robot supporting a wafer requiring normal treatment is located ahead, the express wafer cannot be transferred to the designated processing equipment with the shuttle in the way. Therefore, waiting time occurs for the express treatment wafer. As a result, wafer processing takes up time and throughput is deteriorated, so the prior art system cannot correspond to large item small volume production.        6. If even only one of the shuttles with robots on the wafer transfer line is malfunctioning, the whole transfer line within the bay stops, and wafers cannot be transferred to the multiprocessing equipments. Therefore, the wafers cannot be processed and the treatment of all the wafers within the bay is stopped. Further, the stopping of the transfer line within the bay and the stopping of the processing equipments makes it impossible to transfer the wafers from this bay to the other bays, so the wafer processing at other bays are also stopped. As a result, the wafer processing of all the related bays are stopped.        
The present aims at solving such problems of the prior art.